Department of Electrical Engineering, National Taipei University of Technology Taipei Tech Prevention for COVID-19(open a new window) Find us on Facebook(open a new window)
Search this site | set the webpage to BLUE style set the webpage to ORANGE style set the webpage to GREEN style set the webpage to PURPLE style set the webpage to GRAY style ENLARGE the webpage | Site Map | Home | 中文(Chinese)
Home > Programs > Course Description > Design of FPGA System LAB
::: Design of FPGA System LAB 1 credit　3 hours
1.Introduction to HDL, 2.Time slot LAB, 3.Subroutines LAB, 4. Advanced compiler LAB, 5.Combinational circuit LAB, 6.Sequeutial circuit LAB, 7. FSM LAB, 8. RAM and Rom LAB, 9.Software simulation and burn LAB, 10.Design method LAB, 11.Hua-Heng digital development board LAB, 12.Nios development board LAB, 13.DE2 development board LAB, 14.Built-in IP LAB.
Copyright © 2024 Department of Electrical Engineering, Taipei Tech. All Rights Reserved.
Address: No. 1, Sec. 3, Chung-Hsiao E. Rd., Taipei 106, Taiwan, Republic of China
Tel:+886-2-27712171 Ext.2100　Fax:+886-2-27317187
2140334 Visits since May 26, 2003